Key Takeaways
- Alphabet projects its 2026 capital expenditures between $175 billion and $185 billion, primarily directed at computing infrastructure.
- Capital cannot bypass physical bottlenecks like semiconductor wafer starts, data center permitting, and memory chip manufacturing lead times.
- Basic labor shortages hit hyperscalers directly: Pichai notes Alphabet cannot find the number of qualified electricians required to wire new facilities.
- Memory supply will remain capped through 2027 regardless of spending, forcing labs into a forced compaction cycle where software efficiency replaces brute-force compute.
The Physical Limits of Infinite Capital
Silicon Valley tends to treat hardware supply chains as software problems with longer lag times. If compute runs short, the thinking goes, simply write bigger checks to chip designers and construction firms.
Sundar Pichai laid out why that mental model breaks down when talking with John Collison and Elad Gil. Alphabet is planning for a massive CapEx deployment. “We have said it'll be between 175 and 185,” Pichai confirmed, referring to the company's projected 2026 spending range in billions of dollars. Yet even at that scale, money hits physical ceilings.
The real bottlenecks are not venture dollars or corporate balance sheets. They are physical infrastructure, industrial labor, and component manufacturing. You cannot speed up semiconductor fabrication plants that take four years to build, and you cannot easily bypass city permitting schedules for high-voltage power lines. Even finding boots on the ground is stalling builds. “You can't find a number of electricians we would need,” Pichai said.
When basic trade labor and municipal grid connections dictate the pace of AI development, the fastest balance sheet in the world still has to wait in line.
Memory Bottlenecks and the Compaction Cycle
High-bandwidth memory chips present an even tougher wall than raw power. Building cleanrooms and scaling advanced packaging takes years of specialized tooling that capital cannot compress into a single quarter.
“There is no way that the leading memory companies are going to dramatically improve their capacity,” Pichai explained. “So you have those constraints in the short term, but they get more relaxed as you go out.”
Because of those hard manufacturing limits, Pichai expects the next two years to look very different from the raw scaling race of 2023 and 2024. “No capitalist incentive will really solve '26 or '27 memory supply. That may be the era where you see more divergence in models.”
When you run out of memory bandwidth, throwing larger parameter counts at a problem stops being viable. Instead of training massive, bloated architectures, research labs must squeeze more reasoning and capability into smaller footprints. “I think constraint inspires creativity,” Pichai noted. “It forces a compaction cycle where you get more efficient.”
For builders who spent the last three years assuming hardware would scale infinitely beneath their software, the playbook is flipping. Efficiency, quantization, and architectural optimization will matter far more than raw model scale over the next twenty-four months.
What to Do With This
Audit your model dependencies this week. If your product roadmap relies on frontier model inference costs dropping by 10x through brute hardware scale in 2026, rewrite your unit economics around smaller, distilled open-weights models running on fixed memory footprints.