What will computer chips look like in 2045?
Dwarkesh Patel tours Intel's advanced manufacturing facilities and research labs to investigate the future of semiconductor hardware through 2045. Intel technical leaders detail the development of gate-all-around transistors, backside power, CFET architectures, and hybrid bonding, while Chief Technology Officer Pushkar Ranade addresses the severe equipment supply bottlenecks constraining global chip production amid soaring AI compute demand.
- Copper interconnects lose electrical performance at a 20-nanometer pitch because the mandatory barrier liner consumes too much cross-sectional area. Read →
- Monolithic dies hit an area-versus-perimeter bandwidth wall, pushing advanced chip design from planar 2.5D interposers into direct 3D hybrid bonding. Read →
- Intel set overambitious density targets on its 10-nanometer node through hyperscaling, trying to shrink transistor dimensions without waiting for ready extreme ultraviolet (EUV) lithography tools. Read →
- Leading-edge chip manufacturing requires making major production calls on incomplete data; waiting for full certainty guarantees missing customer delivery windows. Read →
- ASML produces fewer than 100 extreme ultraviolet (EUV) lithography tools per year and will not expand far beyond that mark by 2030. Read →